Export 12 results:
Hall, M., J. Chame, J. Shin, C. Chen, G. Rudy, and M M. Khan, "Loop Transformation Recipes for Code Generation and Auto-Tuning", Proceedings of the Workshop on Languages and Compilers for Parallel Computing, oct, 2009.
Madduri, K., S. Williams, S. Ethier, L. Oliker, J. Shalf, E. Strohmaier, and K. Yelick, "Memory-efficient Optimization of Gyrokinetic Particle-to-Grid Interpolation for Multicore Processors", Proc.\ ACM/IEEE Conf.\ on Supercomputing (SC 2009): The Parallel Computing Laboratory, pp. 48:1–48:12, 2009.
Porterfield, A., N. Nassar, and R. Fowler, "Multi-Threaded Library for Many-Core Systems", Workshop on Multithreaded Architectures and Applications, Rome, Italy, IEEE, 2009.
Tikir, M., M. Laurenzano, L. Carrington, and A. Snavely, "PSINS: An Open Source Event Tracer and Execution Simulator for MPI Applications", Euro-PAR 2009, August, 2009.
Olschanowsky, C M., M. M. Tikir, L. Carrington, and A. Snavely, "PSnAP: accurate synthetic address streams through memory profiles", Workshop on Languages and Compilers for Parallel Computing (LCPC 2009), pp. 353-367, 2009.
Fuerlinger, K, M. S., "Recording the Control Flow of Parallel Applications to Determine Iterative and Phase-Based Behavior", Future Generation Computing Systems, vol. 26, no. 1, pp. 162-166, january, 2009.
Williams, S., J. Carter, L. Oliker, J. Shalf, and K. Yelick, "Resource-Efficient, Hierarchical Auto-Tuning of a Hybrid Lattice Boltzmann Computation on the Cray XT4", Proc. CUG09: Cray User Group meeting: The Parallel Computing Laboratory, 2009.
Tiwari, A., C. Chen, J. Chame, M. Hall, and J. K. Hollingsworth, "A scalable auto-tuning framework for compiler optimization", Proceedings of the International Parallel and Distributed Processing Symposium, apr, 2009.
Tiwari, A., V. Tabatabaee, and J. K. Hollingsworth, "Tuning parallel applications in parallel", Parallel Comput., vol. 35, no. 8-9, pp. 475–492, August, 2009.
Chen, Z., and J. Dongarra, "Algorithm-Based Fault Tolerance for Fail-Stop Failures", IEEE Transactions on Parallel and Distributed Systems, vol. 19, no. 12, 2008.
Dhiman, G., K K. Pusukuri, and T. Rosing, "Analysis of Dynamic Voltage Scaling for System Level Energy Management", Proceedings of the 2008 Conference on Power Aware Computing and Systems, Berkeley, CA, USA, USENIX Association, pp. 9-9, 2008.
Williams, S., Auto-tuning Performance on Multicore Computers, , Berkeley, CA, EECS Department, University of California, Berkeley, December, 2008.
Seymour, K., H. You, and J. Dongarra, "A Comparison of Search Heuristics for Empirical Code Optimization", The 3rd international Workshop on Automatic Performance Tuning, Tsukuba, Japan, IEEE, pp. 421-429, 2008.
Malony, A., S. Shende, A. Morris, S. Biersdorff, W. Spear, K. Huck, and A. Nataraj, "Evolution of a Parallel Performance System", 2nd International Workshop on Tools for High Performance Computing: Springer-Verlag, pp. 169–190, jul, 2008.
Nataraj, A., A. Malony, A. Morris, D. Arnold, and B. Miller, "In Search of Sweet-Spots in Parallel Performance Monitoring", IEEE International Conference on Cluster Computing (Cluster 2008): IEEE, pp. 69-78, 2008.